BARVINN: Barrel RISC-V Neural Network Accelerator

Editor: MohammadHossein AskariHemmat m.h.askari.hemmat@gmail.com

Contents:

• Introduction
• Design
  • BARVINN
  • Matrix Vector Unit (MVU) Array
  • PITO: A Barrel RISC-V Processor
• Verification
  • Verification Environement
  • Testbench Monitor
  • Testbench Predictor
  • Testbench Base
  • Testbench Top
  • Running a Test in PITO Verification Environment
• Software Stack
  • Code Generator
• FPGA Prototyping
• Examples
  • Environment Setup
  • Matrix Multiplication
  • Convolution
  • Classification
  • Segmentation
• Credits and Publications
• Acknowledgement