Credits and Publications
The main contributors of this project are as follow:
Hossein Askari
Sean Wagner
Olexa Bilaniuk
If you found this project interesting and useful, please consider citing our papers:
Our paper on designing BARVINN:
@Article{barvinn_aspdac,
author={AskariHemmat, MohammadHossein and Bilaniuk, Olexa and Wagner, Sean and Hariri, Yassine and Savaria, Yvon and David, Jean-Pierre},
journal= {28th Asia and South Pacific Design Automation Conference ASP-DAC 2023},
title = {BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU},
year = {2023},
doi = {10.1145/3566097.3567872}
}
Our paper on designing PITO:
@INPROCEEDINGS{9114581,
author={AskariHemmat, MohammadHossein and Bilaniuk, Olexa and Wagner, Sean and Savaria, Yvon and David, Jean-Pierre},
booktitle={2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
title={RISC-V Barrel Processor for Accelerator Control},
year={2020},
volume={},
number={},
pages={212-212},
doi={10.1109/FCCM48280.2020.00063}
}
@INPROCEEDINGS{9401617,
author={AskariHemmat, MohammadHossein and Bilaniuk, Olexa and Wagner, Sean and Savaria, Yvon and David, Jean-Pierre},
booktitle={2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
title={RISC-V Barrel Processor for Deep Neural Network Acceleration},
year={2021},
volume={},
number={},
pages={1-5},
doi={10.1109/ISCAS51556.2021.9401617}
}
Our paper on designing MVU:
@INPROCEEDINGS{8702332,
author={Bilaniuk, Olexa and Wagner, Sean and Savaria, Yvon and David, Jean-Pierre},
booktitle={2019 IEEE International Symposium on Circuits and Systems (ISCAS)},
title={Bit-Slicing FPGA Accelerator for Quantized Neural Networks},
year={2019},
volume={},
number={},
pages={1-5},
doi={10.1109/ISCAS.2019.8702332}
}